The semiconductor manufacturing industry continually seeks to improve the processing capabilities and power consumption of integrated circuits (ICs). Traditionally, this has been achieved by shrinking the minimum feature size. However, in recent years, process limitations have made it difficult to continue shrinking the minimum feature size. Therefore, the stacking of multiple device layers into three-dimensional (3D) ICs has emerged as a potential approach to continue improving processing capabilities and power consumption of ICs. One type of 3D IC is a monolithic 3D IC in which multiple device layers are formed directly on a single semiconductor substrate (e.g., a wafer).